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ru.algorithms
- RU.ALGORITHMS ----------------------------------------------------------------
From : Sergey Radkevitch 2:5020/400 28 Jun 2001 11:42:37
To : All
Subject : Re: полином для CRC64
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Еще есть стандарт ITU V.42, где есть CRC-32:
8.1.1.6.2 32-bit frame check sequence
The FCS shall be the 32-bit sequence preceding the closing flag. The 32-bit
FCS shall be the ones complement of the sum (modulo 2) of:
a) the remainder of xk (x31 + x30 + x29 + x28 + x27 + x26 + x25 + x24 +
x23 + x22 + x21 + x20 + x19 + x18 + x17 + x16 + x15 + x14 + x13 + x12 + x11
+ x10 + x9 + x8 + x7 + x6 + x5 + x4 + x3 + x2 + x1 + 1) divided (modulo 2)
by the generator polynomial x32 + x26 + x23 + x22 + x16 + x12 + x11 + x10 +
x8 + x7 + x5 + x4 + x2 + x + 1, where k is the number of bits in the frame
existing between, but not including, the final bit of the opening flag and
the first bit of the FCS, excluding bits inserted for transparency; and
b) the remainder of the division (modulo 2) by the generator polynomial
x32 + x26 + x23 + x22 + x16 + x12 + x11 + x10 + x8 + x7 + x5 + x4 + x2 + x +
1, of the product of x32 by the content of the frame existing between, but
not including, the final bit of the opening flag and the first bit of the
FCS, excluding bits inserted for transparency.
As a typical implementation at the transmitter, the initial content of the
register of the device computing the remainder of the division is preset to
all 1s and is then modified by division by the generator polynomial (as
described above) of the address, control and information fields; the ones
complement of the resulting remainder is transmitted as the 32-bit FCS.
As a typical implementation at the receiver, the initial content of the
register of the device computing the remainder is preset to all 1s. The
final remainder, after multiplication by x32 and then division (modulo 2) by
the generator polynomial x32 + x26 + x23 + x22 + x16 + x12 + x11 + x10 + x8
+ x7 + x5 + x4 + x2 + x + 1 of the serial incoming protected bits and the
FCS, will be "1100 0111 0000 0100 1101 1101 0111 1011" (x31 through x0,
respectively) in the absence of transmission errors.
--- ifmail v.2.15dev5
* Origin: MTU-Intel ISP (2:5020/400)
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